The embodiments described below involve the field of power management in computer systems. As computer systems advance in development, various techniques are evolving to produce more power efficient machines. For example, in the instance of portable computers, such as laptops and notebook computers, it is desirable to improve power efficiency so that the rechargeable power supply lasts a greater amount of time between recharge periods. Therefore, various techniques have arisen to reduce power consumption in these types of computers, particularly during periods of reduced activity or non-use, such as when the user has not operated the keyboard for a particular amount of time. Power consumption techniques also arise in the context of desktop computers. For example, many users prefer to leave their computers turned on during lengthy periods of non-use, and even overnight for purposes of serving other computers, convenience, receiving facsimile transmissions, or simply to avoid a lengthy boot-up procedure upon returning to the computer the next day. During these periods of non-use, therefore, power reduction is also beneficial. Lastly, the combination of portable computers and desktop computers in so-called docking bay configurations also benefit from power adjustments, particularly in instances where the portable computer is removed from the dock, thereby changing the power consumption considerations. These varying configurations each may benefit from improved power performance.
In certain X86 processors, the processor operates in a system management mode ("SMM") which commonly communicates with a separate chipset to control the level of power consumption during periods of reduced activity. Typically, the SMM routine first reads an area of memory space often referred to as the configuration memory, such as the standard CMOS memory which is supported by battery back-up in most personal computers. From this configuration memory, the SMM routine gathers timeout values and other power-related information. The SMM routine then stores this information into a memory area which at boot-up is accessible to the operating system; however, thereafter the SMM routine then makes this area inaccessible to the operating system, typically by setting bits in either microprocessor and/or chipset registers. Thus, thereafter under normal operations (i.e., those after this transient start-up procedure), this memory area is inaccessible to the operating system. The SMM routine also writes certain power information to the separate chipset, such as by writing timeout values to timers in the chipset. The separate chipset in turn monitors various computer peripherals and, upon detecting a peripheral which has been idle beyond its corresponding timeout period, activates an SMM routine by asserting the SMI (system management interrupt) signal. In response, the system enters SMM which powers off the peripheral at issue, until an attempt is later made to access the particular peripheral. Once the new access attempt is made, the SMM routine restores full normal operating power to the peripheral. Note further that these operations for powering off and restoring power to peripherals are well understood in the art. While the prior art SMM strategy reduces power consumption, it suffers significant drawbacks. One such drawback is that the timeout values are stored in an area of memory space which is inaccessible to the computer user through the operating system. As a result, the timeout values are often wholly inaccessible to the user and, therefore, are not subject to change despite potential desires or needs of the user. In other instances, a sophisticated user may know to access these values by having to re-boot his or her system, and then change the values at the BIOS stage of operation rather than using the operating system. However, even for those users who know of this technique, this operation is both inconvenient and inefficient, and may be impractical if the need to change the timeout values arises at a time when boot-up is not possible.
Under the recently produced Windows 95 operating system, certain system timeout values may be input by the user. However, these values are implemented using the operating system and, therefore, this process is not backward compatible. In other words, a user desiring this capability must upgrade the user's operating system and possibly also the user's hardware. Thus, this alternative approach has no applicability to systems which do not use the particular operating system, and this approach cannot be added onto earlier operating systems without completely replacing the prior operating system.
In view of the above, there arises a need to address the drawbacks of the prior art by providing improved power management circuits, systems, and methods.